Waveform Transition Graphs: a designer-friendly formalism for asynchronous behaviours

The paper proposes a new formal model for describing asynchronous behaviours involving the interplay of causality, concurrency and choice. The model is called Waveform Transition Graphs. Its main aim is simplifying the learning process for industrial engineers in accessing powerful synthesis tools provided for Signal Transition Graphs by sacrificing some of the expressive power of the latter. This formalism is developed based on feedback from engineers of Dialog Semiconductor.Peer ReviewedPostprint (author's final draft

Contact:

and data path

Cost-aware synthesis of asynchronous circuits based on partial acknowledgement

Designing asynchronous circuits by reusing existing synchronous tools has become a promising solution to the problem of poor CAD support in asynchronous world. A straightforward way is to structurally map the gates in a synchronous netlist to their functionally equivalent modules which use delay-insensitive codes. Different trade-offs exist in previous methods between the overheads of the implementations and their robustness. The aim of this paper is to optimise the area of asynchronous circuits using partial acknowledgement concept. We employ this concept in two design flows, which are implemented in a software tool to evaluate the efficiency of the method. The benchmark results show the average reduction in area by 28 % and in the number of inter-functional module wires that require timing verification by 67%, compared to NCL-X. 1